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Espressif Systems /ESP32-C3 /RTC_CNTL /INT_ENA_RTC_W1TS

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Interpret as INT_ENA_RTC_W1TS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SLP_WAKEUP_INT_ENA_W1TS)SLP_WAKEUP_INT_ENA_W1TS 0 (SLP_REJECT_INT_ENA_W1TS)SLP_REJECT_INT_ENA_W1TS 0 (WDT_INT_ENA_W1TS)WDT_INT_ENA_W1TS 0 (BROWN_OUT_INT_ENA_W1TS)BROWN_OUT_INT_ENA_W1TS 0 (MAIN_TIMER_INT_ENA_W1TS)MAIN_TIMER_INT_ENA_W1TS 0 (SWD_INT_ENA_W1TS)SWD_INT_ENA_W1TS 0 (XTAL32K_DEAD_INT_ENA_W1TS)XTAL32K_DEAD_INT_ENA_W1TS 0 (GLITCH_DET_INT_ENA_W1TS)GLITCH_DET_INT_ENA_W1TS 0 (BBPLL_CAL_INT_ENA_W1TS)BBPLL_CAL_INT_ENA_W1TS

Description

rtc configure register

Fields

SLP_WAKEUP_INT_ENA_W1TS

enable sleep wakeup interrupt
SLP_REJECT_INT_ENA_W1TS

enable sleep reject interrupt
WDT_INT_ENA_W1TS

enable RTC WDT interrupt
BROWN_OUT_INT_ENA_W1TS

enable brown out interrupt
MAIN_TIMER_INT_ENA_W1TS

enable RTC main timer interrupt
SWD_INT_ENA_W1TS

enable super watch dog interrupt
XTAL32K_DEAD_INT_ENA_W1TS

enable xtal32k_dead interrupt
GLITCH_DET_INT_ENA_W1TS

enbale gitch det interrupt
BBPLL_CAL_INT_ENA_W1TS

enbale bbpll cal interrupt

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data